alfin K

I plan to use this place to document my work, keep short notes for easy reference and write about things I might forget.

Project Log: ch32v006 UART bootloader

published
written by Alfin · category Embedded ·

Use minichlink -T through which you can recieve UART. You can now use printf()(comes with ch32fun.c) and it will send its output via the single DIO line.

  • *(SORT_NONE(.init)) is part of linker script. It will catch all section names .init and places them in the exact order they were passed to the linker. For example there could be one in main, one inside another library etc.

  • This chip supports commpressed instruction meaning instead of the usual 4 byte instructions it can be compressed into 2 bytes. An exeption is the .init section which has interrupt defaults and requires strictly 4 bytes addressing. So we use ALIGN(0x4). There are other places where you have to use 4 bytes alignment such as in RAM(.data & .bss) and .rodata.

TODO:#

  • Split the flash
  • Bootloader runs some needed config
  • Recieve user code (could be implemented last; test it with a dummy in flash program first)
  • Write user code to flash safely
  • Redirect interrupt vector table to user code
  • Jump to user code

I set the flash length as 0x1000 (4kB). But why is 0x1000 to 0x1060 not empty#

fix: Because minichlink did not need to erase the 2nd page since the program in question was only 0x82c long. It was just leftover bits from previous flashes.

Flash Programming & Reading#

  • Can only programme 256 bytes (1 page) at a time; no more no less. Which means your starting address must be 256 byte aligned: addr & 0xFF == 0.
  • starting in other places causes warping and other weird issues. Not ideal.
  • You can have a pointer to a byte or a word.
uint8_t* byte_ptr = (uint32_t*) addr;
uint32_t* word_ptr = (uint32_t*) addr;
  • Uses little-endian. Meaning LSB is located first. Say I retrieve 0x12345678 from address 0x08002000. It is layed out like this:
0x08002000 : 78
0x08002001 : 56
0x08002002 : 34
0x08002003 : 12

RISCV 101#

  • Every full size intruction is word size (32 bit) regardless of rv32 or rv64.
  • Compressed instructions are half word. A processor may or may not include it.
  • General purpose regs are x0, x1...x31.They have alternate descriptive names as well.
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